Moore's Law Refuses to Die: Inside IBM's Push Below 1 Nanometer

Every year, somebody declares Moore’s Law dead. And nearly every year, IBM tears up the obituary. The company has now laid out a credible route below 1 nanometer — a threshold engineers once treated as a brick wall. Here’s why a number that small is tied directly to your phone, your cloud bill, and the future of AI.

One honest note before we dive in. This isn’t a story trending on Hacker News this week. It’s the culmination of a roadmap the chip industry has been quietly building for years. So I’m writing this less as breaking news and more as a “why does this actually matter” explainer.

Just how small is one nanometer

Let’s anchor the scale. A nanometer is one-billionth of a meter. A human hair is roughly 80,000 to 100,000 nanometers thick. So you could line up about 100,000 nanometer-scale structures across the width of a single strand of hair.

Here’s the catch worth flagging: the “nanometer” in modern process nodes no longer matches the physical size of an actual transistor. It has drifted into being a marketing label for generations of technology. But the core truth holds — smaller numbers still mean more transistors crammed into the same slice of silicon.

IBM has long played the role of scout here. It unveiled the world’s first 7-nanometer test chip back in 2015, and a 5-nanometer design using a new transistor architecture in 2017. TSMC and Samsung handle the mass production, but proving that something is physically possible in the first place has consistently been IBM’s job.

Why everyone kept saying we’d hit the wall

The reason shrinking chips gets hard is brutally simple: go small enough, and physics stops cooperating.

The classic villain is quantum tunneling. A transistor is basically a switch that turns current on and off. Make the gate too thin, and electrons just pass straight through the barrier. The switch is nominally “off,” yet current leaks anyway — which means heat and wasted power.

So the industry kept redesigning the transistor itself. It went from flat layouts to the three-dimensional FinFET, then to gate-all-around (GAA) structures that wrap the channel on every side to choke off leakage. IBM’s 5-nanometer reveal mattered precisely because it demonstrated this GAA, or nanosheet, approach.

Going below 1 nanometer demands another leap. The candidates on the table are stacking transistors vertically and adopting new materials that move beyond silicon. This is no longer “make it smaller.” It’s “redesign the whole structure from scratch.”

The AI era dragged miniaturization back into the spotlight

The timing is the interesting part. For a while there was a “haven’t we got enough transistors already?” mood. Generative AI blew that up.

The compute and electricity needed to train a single large language model are staggering. We’ve reached a point where a data center’s power bill can decide whether an AI company survives. That’s exactly where smaller process nodes regain their value — shrink the transistor, and you do the same work on less power.

So sub-1-nanometer tech isn’t a spec-sheet flex. It’s a central weapon in an efficiency race: lower the power a single AI chip burns, and squeeze more computation out of the same watts. It’s the same logic behind Nvidia betting heavily on cooling. The bottleneck has migrated from transistor count to power and heat.

So when does this actually reach us

Time to temper expectations a little. The gap between a lab breakthrough and a product on a shelf usually runs five to seven years.

IBM showed off 7-nanometer in 2015, but 7-nanometer chips didn’t land in phones in earnest until after 2018. Sub-1-nanometer will follow the same arc. There’s still the slog of building production lines, dragging yields up, and recouping the astronomical equipment investment.

Even so, the announcement matters for a clear reason. A “this is physically possible” signal moves the entire industry’s investment and roadmap. Once someone proves there’s a path, everyone else starts paving it.

The takeaway

Moore’s Law has dodged its death sentence yet again. But it’s no longer the tidy “double the transistors every two years” formula. It survives through something far more clever — tearing up structures and materials and rebuilding them. With AI slamming into the limits of power, crossing the 1-nanometer line is a fork in the road for the next decade of computing.

So where do you land? Can miniaturization really run forever — or do we eventually abandon silicon for a computing paradigm we haven’t even named yet?